Toolchains for Computation-in-Memory
- MIREDO: MIP-Driven Resource-Efficient Dataflow Optimization for Computing-in-Memory Accelerator. Xiaolin He, Cenlin Duan, Yingjie Qi, Xiao Ma, Jianlei Yang, Asia and South Pacific Design Automation Conference (ASP-DAC), 2026.
- CIMinus: Empowering Sparse DNN Workloads Modeling and Exploration on SRAM-Based CIM Architectures. Yingjie Qi, Jianlei Yang, Rubing Yang, Cenlin Duan, Xiaolin He, Ziyan He, IEEE Transactions on Computers (TC), 2025.
Master Student
Computer Architecture.
Master Student
Computer Architecture.
