Computation-in-Memory Architecture

  1. Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity. Cenlin Duan, Jianlei Yang, Yiou Wang, Yikun Wang, Yingjie Qi, Xiaolin He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weisheng Zhao",ACM/IEEE Design Automation Conference (DAC), 2024.

  2. DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory. Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD),2024.

  3. NAND-SPIN-Based Processing-in-MRAM Architecture for Convolutional Neural Network Acceleration. Yinglin Zhao, Jianlei Yang, Bing Li, Xingzhou Cheng, Xucheng Ye, Xueyan Wang, Xiaotao Jia, Zhaohao Wang, Youguang Zhang, Weisheng Zhao, SCIENCE CHINA Information Science (SCIS), 2022.

  4. Reconfigurable and Dynamically Transformable In-Cache-MPUF System With True Randomness Based on the SOT-MRAM. Zhengyi Hou, Zhaohao Wang, Chao Wang, Min Wang, You Wang, Xueyan Wang, Cenlin Duan, Jianlei Yang, IEEE Transactions on Circuits and Systems-I: Regular Papers (TCAS-I), 2022.

  5. Accelerating Graph Connected Component Computation with Emerging Processing-In-Memory Architecture. Xuhang Chen, Xueyan Wang, Xiaotao Jia, Jianlei Yang, Gang Qu, Weisheng Zhao, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022. 1. Reconfigurable and Dynamically Transformable In-Cache-MPUF System With True Randomness Based on the SOT-MRAM. Zhengyi Hou, Zhaohao Wang, Chao Wang, Min Wang, You Wang, Xueyan Wang, Cenlin Duan, Jianlei Yang, IEEE Transactions on Circuits and Systems-I: Regular Papers (TCAS-I), 2022.

  6. Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture. Xueyan Wang, Jianlei Yang, Yinglin Zhao, Xiaotao Jia, Rong Yin, Xuhang Chen, Gang Qu, Weisheng Zhao, IEEE Transactions on Computers (TC), 2021.
Cenlin Duan
Cenlin Duan
Ph.D. Student (Co-supervised with Prof. Weisheng Zhao)

Computer Architecture.

Yiou Wang
Yiou Wang
Master Student

Computer Architecture.

Yikun Wang
Yikun Wang
Master Student

Computer Architecture.

Yingjie Qi
Yingjie Qi
Ph.D. Student
Xiaolin He
Xiaolin He
PhD Student

Chip Design.