EMVS accelerator paper is accepted by ACM/IEEE DAC 2022!

👏 Paper title: Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform. In this paper, Eventor is proposed as a fast and efficient EMVS accelerator by realizing the most critical and time-consuming stages including event back-projection and volumetric ray-counting on FPGA. [related project]

PIM architecture paper is published in IEEE Transactions on Computers!

👏 Paper title: Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture. In this paper, we propose to accelerate TC with the emerging processing-in-memory (PIM) architecture through an algorithm-architecture co-optimization manner. [related project]

Federated learning paper is published in ACM International Conference on Information & Knowledge (CIKM’21)!

👏 Paper title: FedSkel: Efficient Federated Learning on Heterogeneous Systems with Skeleton Gradients Update. In this work, we propose FedSkel to enable computation-efficient and communication-efficient federated learning on edge devices by only updating the model’s essential parts, named skeleton networks. [related project]

Systolic architecture paper is published in IEEE Transactions on Computers!

👏 Paper title: S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks. In this work, we propose S2Engine – a novel systolic architecture that can fully exploit the sparsity in CNNs with maximized data reuse. [related project]