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Xingzhou Cheng
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NAND-SPIN-Based Processing-in-MRAM Architecture for Convolutional Neural Network Acceleration
S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks
SparseTrain: Exploiting Dataflow Sparsity for Efficient Convolutional Neural Networks Training
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture
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