Xiaotao Jia

Latest

• NAND-SPIN-Based Processing-in-MRAM Architecture for Convolutional Neural Network Acceleration
• Accelerating Graph Connected Component Computation with Emerging Processing-In-Memory Architecture
• Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture
• Hardware Security in Spin-Based Computing-In-Memory: Analysis, Exploits, and Mitigation Techniques
• An STT-MRAM based reconfigurable computing-in-memory architecture for general purpose computing
• TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture
• Efficient Computation Reduction in Bayesian Neural Networks Through Feature Decomposition and Memorization
• Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration
• SPINBIS: Spintronics based Bayesian Inference System with Stochastic Computing
• Spintronics based Stochastic Computing for Efficient Bayesian Inference System
• Secure and Low-Overhead Circuit Obfuscation Technique with Multiplexers