SCIS paper on NAND-SPIN processing-in-MRAM architecture for CNN acceleration

👏 Paper title: NAND-SPIN-Based Processing-in-MRAM Architecture for Convolutional Neural Network Acceleration.

This paper investigates how spintronic memory can be used not only for storage but also for computation. CNN inference repeatedly moves weights and activations between memory and compute units, so a processing-in-MRAM design can directly target one of the largest efficiency bottlenecks.

The proposed NAND-SPIN-based architecture uses in-memory logic and data-local execution to accelerate convolution-heavy neural network workloads. By embedding useful computation into MRAM structures, the design reduces data movement and opens a path toward more energy-efficient neural network accelerators.

The architecture is motivated by the high cost of repeatedly fetching CNN weights and activations from memory. By taking advantage of spintronic memory behavior, computation can be placed closer to stored data and performed with less communication overhead.

This makes the work part of a broader shift from processor-centric acceleration to memory-centric acceleration. For CNN workloads, where convolution dominates both data reuse and data movement, such PIM designs can substantially improve energy efficiency.