IEEE TCAD paper on accelerating graph connected components with emerging processing-in-memory

👏 Paper title: Accelerating Graph Connected Component Computation with Emerging Processing-In-Memory Architecture.

Connected component computation is a fundamental graph primitive, but its irregular memory accesses and large working sets make it difficult to accelerate using conventional processor-memory organization. This paper explores how emerging processing-in-memory architectures can reduce the data movement that dominates graph analytics workloads.

The work combines algorithmic adaptation with architectural support. By reorganizing graph traversal, data placement, and update operations around PIM-friendly execution, the proposed co-design improves locality and reduces off-chip traffic for connected component analysis.

The study highlights that accelerating graph algorithms requires more than placing simple arithmetic near memory. Graph connected component computation involves irregular propagation and repeated updates, so the algorithm itself must be shaped to match the strengths and limits of PIM hardware.

By aligning the computation pattern with emerging memory-side execution, the work offers a path toward more efficient graph analytics systems. It also provides design lessons for other graph workloads that suffer from similar data movement and locality challenges.